AMD's earnings call to investors revealed that they plan to ingrain their future EPYC CPUs with the recently acquired Xilinx FPGA AI inference engine. The first line of new processors will launch next year, showing the company's immediate focus on the significant growth bred from the $54 billion purchase of the chipmaker for AMD's future needs. Patents that have appeared since the acquisition demonstrate that the company is looking to enable AI accelerators to their line of processors through multiple designs and develop a 3D chip stacking technique loosely based on Intel designs.
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In the latter half of 2015, Intel purchased company Altera for $16.7 billion. After the acquisition, Intel began to work on designs based on Altera's chip technology, which partnered with CPUs and FPGAs. However, even after announcing the technology and offering designs on display, the silicon required for the chips was unavailable until 2018. Once the silicon was accessible, it was constrained and experimental in design and failed to launch fully. Intel has never returned to the project since then, so it is unsure if they plan to incorporate it into the future.
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Victor Peng, AMD's president of its Adaptive and Embedded Computing group, commented during the call that Xilinx was previously utilizing the AI engine for image recognition. The recently acquired company created other inference applications in AMD's current embedded software and edge products, like automobiles. Peng mentioned that the structure technology could be adaptable and adjustable — a construction that AMD requires.
We are absolutely working on the unified overall software enabled the broad portfolio, but also, especially in AI. So you will hear more about that at the Financial Analyst Day, but we are definitely going to be leaning in AI both inference and training.
— Victor Peng, AMD's president of its Adaptive and Embedded Computing group
While AMD is still quiet about the future of the company's new FPGA-based products, there is anticipation that the new chipset will be highly advanced. With the standards for PCIe improving and the QPI interconnects compatible with the FPGA chipset for the CPU, AMD will use their technology to create accelerator ports to be even more consistent across multiple devices and technologies.
AMD will include 3D stacking chip technology with an FPGA chiplet on top of the I/O die on the CPU. This process is similar to what the company utilizes for the Milan-X chips. The 3D stacking tech increases performance, memory throughput, and power but could potentially cause issues with temperature maintenance. Increasing heat on the CPU can create performance issues if the FPGA chiplet is increasingly close to the I/O dies. However, AMD locating the accelerator on top of the die may assist with the thermal problems and add additional performance from the CPU chiplets.
AMD recently revealed their EPYC Bergamo CPUs that offer 128 cores and utilize a new Zen 4c core programmed to be highly efficient when using cloud applications. With an accelerator port in AMD's CPU designs, the company can use other accelerators, such as ASICs, DSPs, and GPUs, in their designs. Consumers would essentially have the option to choose the best options for their individual needs. This action would also allow the company to make the methods proprietary, increasing its foothold in the marketplace. Data centers would see an increase in accessibility and varying price points, allowing each enterprise to choose the technology that would suit the needs of their customers.
We now have the best portfolio of high-performance and adaptive computing engines in the industry, and we see multiple opportunities to leverage our expanded technology portfolio to deliver even stronger products.
— Dr. Lisa Su, Chief Executive Officer, AMD
AMD's Financial Analyst Day is June 9, 2022. The two AMD execs hinted that the company would convey more information about its continuing plans for Xilinx, the upcoming acquisition of networking chip provider Pensando other next-gen software in development at the event.